The present invention relates generally to operational amplifiers, and more particularly to improvements which reduce power consumption while also providing high dynamic range in general purpose operational amplifiers capable of driving both large and small load capacitances and also capable of driving resistive loads. Traditionally, the main way to increase the capacitive load drive of a Miller compensated amplifier has been to increase the power consumption of the output stage. There are a number of amplifier compensation approaches described in the literature that attempt to achieve high capacitive load drive with less power than is required for a Miller compensated amplifier. There normally are trade-offs for these approaches that compromise the resulting amplifier's performance in some way. A variation of a two-gain-stage Miller compensated amplifier that can be made stable driving any load capacitance, if the gain of the first stage is made low enough, is described in the article “An Unconditionally Stable Two-Stage CMOS Amplifier” by Reay, R. J. and Kovacs, G. T. A., IEEE Journal of Solid-State Circuits, May 1995, Volume: 30, Issue: 5, pages 591-594. This approach works well for some applications, but it has low open loop gain when driving resistive loads, and it also has stability issues when driving small load capacitances in the presence of DC load currents.
A three gain stage approach which has higher gain compared to the Reay two-stage approach is presented in “A Three-Stage Amplifier with Quenched Multipath Frequency Compensation for All Capacitive Loads” by Jingjing Hu, Huijsing, J. H., and Makinwa, K. A. A., IEEE International Symposium on Circuits and Systems, New Orleans, La., May 27-30, 2007, pages 225-228. The three-stage amplifier technique disclosed in that reference works well for driving high capacitive loads but has stability problems at small capacitive loads and high DC load currents, due to the phase shift added by the second gain stage. High DC load currents increase the bandwidth of the third stage, and result in excessive bandwidth in the Miller loop when driving small load capacitances.
Another three-gain-stage approach to driving large load capacitance is disclosed in the article “Three-Stage Large Capacitive Load Amplifier with Damping-Factor-Control Frequency Compensation” by Leung et al., IEEE transactions on solid-state circuits, Vol. 35, No. 2, February, 2000, pages 221-230. This approach uses the second gain stage to boost the forward gain of the Miller feedback loop, and also uses an active damping network to control the phase shift from the second stage. The additional gain provided by the second gain stage improves the capacitive load drive by increasing the unity gain-bandwidth of the Miller feedback loop.
Prior Art FIG. 1A shows an ordinary two-stage operational amplifier 1A including a first gain stage 2 having its output connected by a high impedance node 3 to the input of a second gain stage 5. The output of gain stage 5 is connected by output conductor 7 to produce Vout, which is fed back to high impedance node 3 by means of Miller feedback capacitor CM.
Similarly, Prior Art FIG. 1B shows a two-stage operational amplifier 1B including a first transconductance stage 2 which has transconductance G1. First gain stage 2 may be configured as an inverting stage, wherein its (+) input receives an input signal Vin+ and its (−) input receives the input signal Vin−. The output terminal of first stage 2 is connected by conductor 3 to the input of an inverting second transconductance stage 5 having a transconductance G2. Conductor 3, which is referred to as a high impedance node, is connected to one terminal of a gain reduction (damping) resistor RD (which is similar to resistor R1 in the Reay paper), the other terminal of which is connected to ground. High impedance node 3 also is connected to the drain of a P-channel cascode transistor MCASCODE. A parasitic capacitance C1 is coupled to high impedance node 3. The gate of MCASCODE is coupled to a suitable bias voltage, and its source is coupled by conductor 6 to one terminal of a Miller feedback capacitor CM, the other terminal of which is connected by conductor 7 to the output of second stage 5. Conductor 6 is referred to as a “cascode point”. An output voltage Vout is generated on conductor 7, and is applied to a load capacitance CLOAD.
The architecture of FIG. 1B works best for operational amplifiers that drive purely capacitive loads (ie., loads which draw no significant DC output current and which present no load resistance). If the gain of first stage 2 is reduced by lowering the damping (i.e., gain reduction) resistance RD at the output of first stage 2, then the RC pole at that point caused by damping resistor RD and parasitic capacitance C1 may occur at a sufficiently high frequency that its phase shift will not destabilize operational amplifier 1B when the pole due to the output stage starts to cause the overall amplifier response to become unstable. Lowering the gain of the first stage by means of gain reduction resistor RD moves the foregoing RC pole to a higher frequency.
Also, Miller feedback capacitor CM is connected to cascode point 6 to prevent CM from excessively loading high impedance node 3 at the input of second amplifier stage 5. This allows a higher value of resistance of the damping resistor RD to be used.
The reduced gain of the first gain stage 2 means that operational amplifier 1B of Prior Art FIG. 1B must rely mainly on second amplifier stage 5 to achieve the required overall amplifier gain. Unfortunately, that results in operational amplifier 1B having lower DC gain when it drives a resistive load. Furthermore, the connecting of Miller capacitor CM to cascode point 6 results in a second pole in the Miller feedback loop, and that second pole usually results in stability problems if the operational amplifier 1B is utilized to drive a low value of load capacitance CLOAD, unless the value of transconductance G2 is a relatively well known quantity. Since the value of G2 normally varies with DC load current, operational amplifier 1B is difficult to keep stable at small load capacitance with large variations in DC load current.
The high gain achieved in operational amplifier 1B by reducing the gain by means of damping resistor RD and by relying on second stage 5 for most of the overall amplifier gain is lost if operational amplifier 1B drives a resistive load, because the resistive load sharply reduces the second stage gain.
One problem with the prior architecture of FIG. 1B is that it is not able to drive a resistive load and nevertheless have a sufficiently high gain for many applications, because the gain of the first stage is already low, and any resistive load lowers the gain of the second stage, and hence the entire amplifier, to roughly 200. However, a gain of 100,000 or more typically is desirable. Stated differently, the operational amplifier gain with a resistive load is likely to be in the range of 30 to 50 DB, whereas a gain of 100 DB is what is desired.
Thus, a gain-reduced two-stage amplifier with cascoded Miller compensation as shown in Prior Art FIG. 1B is mainly suitable for driving capacitance loads but suffers from low DC gain when driving resistive loads, and also suffers from stability problems when driving a low capacitance load in the presence of widely varying DC load currents. Unfortunately, the main prior way of increasing the gain of the second stage 5 has been to increase its power consumption. However, it would be highly advantageous to be able to increase the second stage gain without greatly increasing the power consumption.
Thus, there is an unmet need for a general purpose operational amplifier capable of driving high load capacitance and a wide range of current and resistive loading, while maintaining high gain and precision but dissipating substantially less power than in prior general purpose operational amplifiers.
There also is an unmet need for a two-stage operational amplifier which does not achieve essentially all of its gain from its second stage.
There also is an unmet need for an operational amplifier which does not lose a large amount of gain when the operational amplifier is driving a resistive load.
There also is an unmet need for an operational amplifier which does not lose a large amount of gain while driving a resistive load and which consumes a relatively low amount of power.
There also is an unmet need for a general purpose operational amplifier which achieves adequate gain while driving either a low or high capacitance load and/or a resistive load.